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超高速瞬态测试系统软硬件构架设计研究
引用本文:张荣,陈颖,黄海莹,王松.超高速瞬态测试系统软硬件构架设计研究[J].装备环境工程,2015,12(2):81-86.
作者姓名:张荣  陈颖  黄海莹  王松
作者单位:中国工程物理研究院 总体工程研究所,四川绵阳,621900
基金项目:中物院总体所专项基金(PXI-64) FundSupported by Special Fund Project"PXI-64"of Institute of Systems Engineering
摘    要:目的研究采样频率为2~10 MHz的64通道超高速同步瞬态测试系统的设计技术,实现两类典型超高速瞬态测试系统的硬件架构设计与软件架构设计。方法一类采用PXI-Express高带宽总线和高速RAID磁盘阵列架构构建持续流盘存储的连续高速测试系统,另一类是采用大容量板载数据缓存和PXI总线事后下载传输数据的架构构造高速测试系统。在高性能测试软件设计方面,主要应用生产者/消费者结构与有限状态机相结合的软件架构进行高性能测试系统软件设计。结果目前64通道下基于持续流盘架构的测试系统受数据记录的速度限制系统最高采样频率仅达2.5 MHz,而基于板载缓存数据与PXI总线事后下载数据架构的测试系统最高采样频率可达10 MHz,测试时长可达5 s。结论当前两类架构的测试系统均可满足超高速瞬态测试需求,设计时需根据需求的最高采样频率决定使用的架构形式。

关 键 词:超高速瞬态测试系统  PXI  Express总线  RAID阵列流盘  状态机
收稿时间:2014/12/30 0:00:00
修稿时间:2015/4/15 0:00:00

Research on the Software and Hardware Architecture Design Technique for Ultrahigh-speed Transient Testing System
ZHANG Rong,CHEN Ying,HUANG Hai-ying and WANG Song.Research on the Software and Hardware Architecture Design Technique for Ultrahigh-speed Transient Testing System[J].Equipment Environmental Engineering,2015,12(2):81-86.
Authors:ZHANG Rong  CHEN Ying  HUANG Hai-ying and WANG Song
Abstract:Objective The design technique for 64 channels ultrahigh-speed synchronous transient testing system with data sampling frequency of 2 MHz-10 MHz was researched, in order to realize the design of hardware architecture and software architecture for two kinds of typical ultrahigh-speed transient testing systems. Methods For hardware architecture, the continuous high-speed test system with continuous flow disk storage constructed based on PXI-Express bus data transmission and RAID array stream disk data saving and the high-speed test system constructed based on large capacity on-board cache data saving and bus downloading transmission were applied in detail. For high-performance system software design, the design technique with application of producer/consumer architecture and finite state machine was applied. Results Currently, for system with 64 channels, the data sampling frequency could only reach 2.5 MHz with the limitation of file writing speed based on PXI Express bus and raid array stream disk data saving architecture, while the data sampling frequency could reach 10 MHz based on architecture with on-board cache data and PXI bus downloading data, in this condition, the test time of the system could reach 5 s. Conclusion These two kinds of test systems could both meet the requirements of ultrahigh-speed transient test, and the system architecture could be decided by the maximum sampling frequency required.
Keywords:ultrahigh-speed transient testing system  PXI Express bus  RAID array stream disk  finite state ma-chine
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